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AMD Mobile Serial VID Dual-Phase
Fixed-Frequency Controller
?
Keep the drivers close to the MOSFET, with the
gate-drive traces (DL, DH, LX, and BST) short and
wide to minimize trace resistance and inductance.
This is essential for high-power MOSFETs that
require low-impedance gate drivers to avoid shoot-
through currents.
V DDNB
SPLIT CORE
CPU SOCKET
?
When trade-offs in trace lengths must be made, it is
V CORE0
V CORE1
preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-
side MOSFET or between the inductor and the out-
put filter capacitor.
KELVIN SENSE
C OUT
C OUT
C OUT
C OUT
Layout Procedure
1) Place the power components first, with ground ter-
minals adjacent (low-side MOSFET source, C IN ,
VIAS UNDER
THE INDUCTORS
FOR DCR SENSING
INDUCTOR
INDUCTOR
C OUT , and DL anode). If possible, make all these
connections on the top layer with wide, copper-
filled areas.
2) Mount the driver IC adjacent to the low-side
MOSFETs. The DL gate traces must be short and
wide (50 mils to 100 mils wide if the MOSFET is 1in
from the driver IC).
C IN
C IN
POWER
GROUND
C IN
C IN
3) Group the gate-drive components (BST capacitors,
V DD bypass capacitor) together near the driver IC.
4) Make the DC-DC controller ground connections as
shown in the standard application circuit in Figure
2. This diagram can be viewed as having three sep-
arate ground planes: input/output ground, where all
the high-power components go; the power ground
plane, where the PGND pin, V DD bypass capacitor,
and driver IC ground connection go; and the con-
troller’s analog ground plane where sensitive ana-
INPUT
C VCC
log components, the master’s GND pin, and V CC
bypass capacitor go. The controller ’s analog
ground plane (GND) must meet the power ground
CONNECT THE
EXPOSED PAD TO
ANALOG GND
ANALOG
plane (PGND) only at a single point directly
beneath the IC. The power ground plane should
connect to the high-power output ground with a
short, thick metal trace from PGND to the source of
the low-side MOSFETs (the middle of the star
ground).
5) Connect the output power planes (V CORE and sys-
tem ground planes) directly to the output-filter
capacitor positive and negative terminals with multi-
ple vias. Place the entire DC-DC converter circuit
as close to the CPU as is practical. Figure 13 is a
PCB layout example.
Figure 13. PCB Layout Example
GROUND
(INNER
LAYER)
42
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